1. Field
The various embodiments of the present invention relate to chip-last embedded interconnect structures and methods of making the same.
2. Description of Related Art
The trend in miniaturized and highly-functional electronic modules is driving the need for embedded actives and passives that enables highly-complex heterogeneous sub-systems and systems. Two-types of embedding technologies currently exists, both of which are based on “chip-first” techniques and include (1) embedding by wafer-level fan-out (WLFO), and (2) embedding in organic substrates. Alternative technology, called “chip-last” technology has the potential to overcome manufacturing and business challenges of chip-first technology, however chip-last technology also presents challenges. For example, the fabrication of multiple substrate layers and cavity formation for the chip can be difficult, and the associated cost of the substrate can be relatively high, and thus undesirable.
Therefore, there is a need for a chip-last technology that addresses these problems. It is to this need that the present invention is directed. Specifically, the invention disclosed herein addresses the limitations listed above using chip-last embedding technology yet retains the benefits of and achieves a structure similar to the WLFO structure of the prior art.